Article · AI translation
AI computing power utilization reaches nearly 99%.
The more a company relies on software, the more it values hardware —
Momenta, known for its intelligent driving models, appeared at the first public unveiling of a chip company founded just over two years ago.
Its first chip was adapted on Day 0.
The sister companies have finally joined forces, giving the company with the strongest intelligent driving models an added advantage.
XHEART has now become Momenta's key hardware partner.
With both models and chips, Momenta's intelligent driving model performance, and even the company as a whole, face a new valuation.
The chip is called X7 Ultra. Judging only by its computing power, 700 TOPS can no longer be considered “extreme” by the end of 2026.
But the company places greater emphasis on two other metrics.
First, the similarity between the quantized model's output and that of the FP32 reference model exceeds 99.99%.
The point is that X7 Ultra does have higher inference efficiency, but it does not allow quantization error to grow unchecked; instead, it requires the quantized model's output to remain as close as possible to that of the FP32 model.
Large models consume enormous amounts of computing power, memory and energy. Reducing the precision of model weights and computations is a main way to cut storage and computation costs. But compress them too aggressively, and the output may deviate.
Getting this trade-off right directly determines how large a model can run within a limited power budget.
The second metric is NPU compute utilization of 98.7%, meaning that, when running test tasks, the chip's AI compute units spend the vast majority of their time performing useful computations and very little time idle.
This usually also means the chip architecture, data transfer and software scheduling work well together, so compute units are less likely to sit idle waiting for data or instructions.
The company provides these reference figures: compared with flagship products in the industry, memory bandwidth consumption is 80% lower and energy efficiency is 100% higher.
Looking back at the 700 TOPS figure now makes its distinguishing feature clearer:
This is the industry's first use of “large-model computing power” to describe chip performance.
TOPS has generally referred to dense or sparse computing power. Those concepts can describe a chip's theoretical computing capability, but on their own they struggle to answer a question closer to real-world experience: when a model actually used for intelligent driving runs on the chip, how fast and how reliably does it run?
For example, laboratory metrics such as APS, which measure how long a particular model takes to run, can help engineers analyze chip performance.
But real large intelligent driving models involve complex network structures, different types of operators, frequent data reads and writes, and scheduling across multiple computing tasks. Making one stage run very fast has limited value if other stages slow the whole process by waiting for data, lacking memory bandwidth or being scheduled inefficiently.
A gap can ultimately emerge between laboratory benchmarks and a production model's actual performance and driving experience.
The idea behind evaluating “large-model computing power” is to test the chip directly with a real production intelligent driving model, rather than relying solely on laboratory benchmarks.
That shifts the subject of evaluation from relatively independent computing tasks to an intelligent driving large model in actual deployment.
This evaluation also has several explicit constraints: the model structure cannot be changed at will, computational precision must be maintained, and the final driving experience cannot be compromised. The chip must make the model run as efficiently as possible while meeting all these conditions.
That is what “large-model computing power” aims to measure: how much computing capability a chip can provide under the constraints of a real production model and strict deployment requirements, so that the performance figure more accurately describes the work an intelligent driving system actually has to do.
And at this stage, that model is Momenta's R7 world model —
To be frank, this chip company does have very deep ties to Momenta.
XHEART — the two companies have no direct ownership relationship. Momenta founding team members Cao Xudong and Xia Yan merely hold shares in XHEART indirectly through its controlling shareholder.
It is a “sister company” to Momenta. Its first mass-produced product, X7, is already in production in a new SAIC Volkswagen vehicle, but the launch of X7 Ultra marks XHEART's first formal public appearance.
First, imagine how an intelligent driving model works inside a car.
Cameras and lidar feed in data, the model computes through layer after layer, and it ultimately produces the information needed for perception and driving decisions. The entire process must finish within a limited time.
The problem is that an awkward situation can easily arise inside the chip: powerful compute units wait for data; some operators run extremely fast while other operations hold up the entire chain; and as sensor data grows, front-end processing develops a long queue.
For an on-device AI chip, the worst case is one part racing ahead while the other stages follow at a leisurely pace.
X7 Ultra's first step is to give its NPU an extra-large-core architecture and increase inter-core interconnect bandwidth.
This choice is driven directly by how large models compute:
As models grow, large numbers of computing tasks must be organized for execution, and compute units also exchange data. Extra-large cores, paired with more efficient interconnects, can reduce the overhead of this collaboration and keep computing resources working more continuously.
But faster matrix computation does not mean the entire model runs faster, because neural networks also contain many supporting operators, such as LayerNorm, Softmax and Transpose.
They may not account for the largest share of computation, but they can appear repeatedly along a model's execution path. If one operator is slow, subsequent computations have to wait for their turn.
X7 Ultra has dedicated compute engines for these operations, effectively assigning frequently used tasks in the model their own workstations and reducing the time they occupy general-purpose computing resources.
With the hardware tasks arranged, the software still has to assign the work well.
A model must be compiled and scheduled to run on a chip. But if every operation executes independently, with intermediate results repeatedly written to external memory and then read back, compute units waste a great deal of time waiting for data.
X7 Ultra, or rather XHEART, has built a unified solution for all its chips: an AI toolchain. Through computation graph fusion, parallel execution and task scheduling, it links computations that can be combined as much as possible and reduces the back-and-forth movement of intermediate data.
In this product, X7 Ultra consumes 80% less memory bandwidth than common products and delivers 100% higher energy efficiency. These two figures reflect the design goals of moving less data and using computing resources more efficiently.
Of course, an intelligent driving system consists of more than a neural network. A fair amount of preliminary work takes place before sensor data enters the model.
Take lidar: as the number of scan lines increases, the same scene produces a denser point cloud with richer detail, and the processing workload grows. The camera pipeline has another easily overlooked issue: latency jitter.
X7 Ultra provides targeted solutions. For example, a dedicated lidar accelerator in its processing subsystem can process 20 million points per second, meeting the point-cloud processing needs of lidar with roughly 1,000 scan lines.
For the camera processing pipeline, local multicore processing and pipeline control have been optimized, improving processing stability by 100% compared with traditional solutions.
Then there is the “dispatcher” for the whole chip: the CPU.
X7 Ultra uses an automotive-grade Arm v9 CPU. This is also the first deployment of the Arm v9 architecture in China.
Compared with the previous generation, core performance is up 20% and energy efficiency is up 10%, while vector processing, multicore coordination and L3 cache access have been optimized.
The final hurdle is safety. X7 Ultra's SoC meets the ASIL-B standard, while its integrated MCU meets ASIL-D. They handle functional safety tasks at different levels and provide a hardware foundation for fault monitoring, control and exception handling.
Taken together, these designs show that X7 Ultra does more than add computing power to the NPU. It addresses computation, data movement, sensor processing and system scheduling together:
The model spends less time waiting for computations, data moves in and out more smoothly, and front-end processing does not hold things back. That allows the entire chip to handle intelligent driving tasks more efficiently.
That is also why XHEART repeatedly emphasizes that, compared with laboratory testing standards, it makes more sense to “test chips using production large intelligent driving models.”
Back when autonomous driving was still in its rudimentary era, relying on high-definition maps and rules, and the industry treated opening service in new cities as its gold-standard metric, Momenta CEO Cao Xudong repeatedly advocated ideas such as the data flywheel and walking on two legs.
The views that set him apart from the crowd then have now become widely accepted technical principles: end-to-end systems, map-free driving, data-driven approaches, reinforcement learning and world models.
This also helps explain why Momenta has stood out in the highly competitive autonomous driving industry, leading in the breadth of its automaker partnerships, the number of vehicle models and the deployment volume of its solutions.
Beginning with XHEART's first public appearance and the launch of X7 Ultra, Cao Xudong publicly updated his thinking for the first time:
He called “large models defining chips” Momenta's third major judgment.
The central idea is that as intelligent driving models continue to improve, computing architectures must evolve alongside them. Accordingly, the Moore's law of intelligent driving also needs to be reassessed.
This view took shape in 2022, and XHEART began putting it into practice in 2023. That timing coincided with a rapid, profound restructuring of the foundations of autonomous driving technology.
On the hardware side, the economies of scale of mass-produced L2 systems began to take effect, sensor and chip costs fell rapidly, and top-tier intelligent driving configurations gained a basis for installation in mass-produced vehicles.
On the model side, data-driven approaches rapidly replaced traditional methods. Beyond the Transformer architecture, model iteration and optimization themselves shifted from manual parameter tuning and rule-based constraints to feeding back large volumes of data with specific distribution characteristics to drive reinforcement learning.
Transformer-based end-to-end intelligent driving models essentially learn representations of the environment, temporal relationships and driving decisions from vast amounts of data. The information they need to process is becoming increasingly complex: they must understand the current road environment and use information from successive moments to judge the behavior of vehicles, pedestrians and other road users before producing driving actions.
World models place still greater emphasis on predicting the state of the physical world and how it will change, giving systems stronger environmental understanding and the ability to project future developments.
Cao Xudong believes that deploying autonomous driving at scale may require on-device models with at least 10B, or even 100B, parameters. Only models of that size may make it possible to deploy true L4 driving at a scale starting in the millions.
Parameter count is only one dimension. Operator types, data access patterns and the ways computing tasks run in parallel also affect whether a model can run in real time in a vehicle.
That puts the computing demands facing chips on a much larger scale. While meeting constraints on power consumption, automotive-grade reliability and cost, chip designers must work with model architects from the design stage to decide which operators merit dedicated acceleration, which data transfers should be repeated less often and which computing tasks are suited to parallel processing.
If the data flywheel, the two-legged approach and chips built on a native architecture can be combined, model improvements will no longer depend solely on isolated optimizations by the algorithm team; the underlying hardware will also evolve around the model's actual needs.
Momenta's technology system could then connect data accumulation, model training and iteration, chip computation, and final deployment in mass-produced vehicles.
Between 2022 and 2026, the intelligent driving experience improved roughly 10-fold every two years. This was the industry's widely accepted “Moore's law” for intelligent driving.
But viewed through the framework of “large models defining chips,” Momenta has already put a new positive feedback loop into practice: models determine computing needs, while computing architecture in turn affects how large a model can be deployed in a vehicle and at what cost.
Expanding production scale, in turn, provides a continuing source of data for models and opportunities to test their capabilities. Once these parts work together, a breakthrough at one point can translate into faster iteration of the whole system.
A 10-fold improvement every 2 years may not be a fixed figure. Large models defining chips are accelerating the Moore's law of intelligent driving toward a 10-fold improvement every year.
The first and most likely place to test this is in deployed L4 autonomous driving applications, including robotaxis, driverless delivery vehicles and driverless trucks.
Momenta, with higher computational efficiency on the vehicle side, partners for chip-operator and IP-level optimization, and a mature production supply chain and cost-control capabilities, has become the single most influential variable.
The English name of 新芯航途, XHEART, retains an X that can continue to take on new meanings: today it is cars; in the future, it may also be robots and other intelligent-agent devices. Momenta’s technology system thus has the potential to extend from autonomous driving to physical AI more broadly.
After all, autonomous driving and robotics share needs in perception, decision-making, real-time response and energy efficiency. Robots’ stricter heat-dissipation constraints also give the low-power design that 新芯航途 has long emphasized greater potential value.
Of course, products for different intelligent-agent devices still need to be redesigned around their specific tasks. But Momenta and XHEART have already taken a step ahead in chip architecture for large Transformer models, underlying toolchains, and experience coordinating software and hardware.